Why Write Data Interleaving is removed from AXI 4?, where it was available in AXI 3 . What was actual problem with that(Write Data Interleaving) concept .
Please answer.
The reason interleaving was in AXI3 was to maximise the write data bus bandwidth, using gaps in master's write data availability to pass transfers for other write transactions.
However most applications tended to buffer up the write data at the master and then pass it in consecutive transfer cycles, rather than try to interleave transfers from different transactions, so there wouldn't then be these gaps.
So as interleaving added complexity at the master and slave ends, having to interleave and de-interleave (I know that isn't a real word) the write data streams, and it wasn't often used, it was removed from the AXI4 protocol.