Hello,
I'm doing some research about hard real-time systems. I would like to know what are the differences that make a Cortex-R more suitable for hard real-time tasks. I'm asking here because I have already done a lot of research and things are not clear.
Firstly, it seems that the interrupt latency is bigger for a Cortex-R5 (about 20 cycles) than for a Cortex-M7 (about 12 cycles), since the Cortex-R has a bigger pipeline and no mechanism such as tail-chaining and late arrival handling of IRQ it doesn't surprise me but why is it like that since the Cortex-R should be more adapted to hard real-time than Cortex-M ?
Secondly, most available features on Cortex-R processors (TCM, MPU, Data and Instr. Cache, Long pipeline, dual issue, lockstep support) are also optionnaly available on Cortex-M.
The only two things that are specific to Cortex-R are the high clock speed and functional safety related features such as Lock step, ECC memory, etc...
Is there some other architectural differences that make Cortex-R more deterministic and more appropriate to hard real-time than Cortex-M?
It is not very clear.
Thank you for your help.
Hello, does anybody from ARM have any information on this ?