Hello,
Cortex-A510 TRM descibes that within a dual-core complex, VPU is shared between cores.
If the two cores in one complex use VPU simultaneously, how to handle the access conflict?
Does the software need resolve exclusive access on VPU? Is it transparent to software?
Best Regards,
Yan
Hi Emmy0
I have moved your question to the Architectures and Processors forum where someone may be able to help you.
Thanks
Oli
Arm Community Manager