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Cortex-R52 exception priority

Grace WANG

Hi

Do the Cortex-R52 exceptions have priority ? If for the particular timing, two exceptions happen at the same time, such as IRQ and abort exceptions, what CPU will do ?

BR, Grace

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  • +1

    For the full answer, you need the spec:

    Arm Architecture Reference Manual - G1.13.2 "Exception prioritization for exceptions taken to AArch32 state"

    developer.arm.com/.../

    (Armv8-R inherits these rules from Armv8-A).

    If you're thinking about sync vs async, it can be hard for software to know whether the async came slightly before, at the same time, or slightly after the sync exception.  That matters because of what happens to the async masks on exception entry.  Taking an exception will cause CPSR.I (PSTATE.I) to be set, which masks IRQs until the mask is cleared. 

    Also, if you're thinking of multiple interrupts happening at once then it's down to the GIC.  GIC lets you set priorities and pre-emption controls.

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  • +1

    For the full answer, you need the spec:

    Arm Architecture Reference Manual - G1.13.2 "Exception prioritization for exceptions taken to AArch32 state"

    developer.arm.com/.../

    (Armv8-R inherits these rules from Armv8-A).

    If you're thinking about sync vs async, it can be hard for software to know whether the async came slightly before, at the same time, or slightly after the sync exception.  That matters because of what happens to the async masks on exception entry.  Taking an exception will cause CPSR.I (PSTATE.I) to be set, which masks IRQs until the mask is cleared. 

    Also, if you're thinking of multiple interrupts happening at once then it's down to the GIC.  GIC lets you set priorities and pre-emption controls.

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