Hello
When executing MSR CPSR_cx, #0x1F, the Cortex-R52+ goes to data abort.
DFSR reports 0x1A11, asynchronous external abort for write and DFAR is 0.
Before MSR CPSR_cx, #0x1F, the value of CPSR is 0x200001DF.
Could you help share possible reasons which could lead to such issue ?
Thanks and regards. Grace
CPSR_cx means you're writing bits 15:0 of the CPSR.
MSR (immediate): Move immediate value to Special register.
As the original value of those bits was 0x01DF and the written value is 0x001F the effect is to clear the interrupt masks (CPSR.I/F/A)
https://developer.arm.com/documentation/ddi0601/2024-09/AArch32-Registers/CPSR--Current-Program-Status-Register?lang=en
Putting that all together, I think it's the clearing of CPSR.A that's the issue. You were running with SErrors (which can be asynchronous aborts) masked, you then unmasked SErrors and got an async abort. So at some point in the past the core did something that caused an async abort, but you're only finding out about it now because at the time those aborts were masked.
Question - why are you clearing CPSR.A?