dear arm,
Is there a more detailed document that introduces how to use assembly and intrinsics in C code?
I found a breif introduction in migration_and_compatibility_guide_v6.18. But after reading it, I still don't know how to modify the format to meet Arm Compiler 6' requirements .
The code blow shows the example in migration_and_compatibility_guide_v6.18:
// __asm in Arm Compiler 5 int add(int i, int j) { int res; __asm { ADD res, i, j SUB res, i, res } return res; } // __asm in Arm Compiler 6 int add(int i, int j) { int res = 0; __asm ( "ADD %[result], %[input_i], %[input_j] \t\n" "SUB %[result], %[input_i], %[result] \t\n" : [result] "=&r" (res) : [input_i] "r" (i), [input_j] "r" (j) ); return res; }
But how should I modify the code below to meet Arm Compiler 6's requirements?
MOV sum, var1, LSL #16 QADD sum, sum, temp MOV result, sum, ASR #16 MOV zero, #0 RSB var2_inv, var2, #0
many thanks!
These are just macro definitions and include paths. They should not affect the compilation. I'm sorry, but I don't understand why it works for me, but not for you. Can you copy the above source exactly and test? Perhaps there is a mistake in your original source?The following builds for me without error (both Arm and Thumb):
armclang --version ... Arm Compiler for Embedded 6.18 armclang -c --target=arm-arm-none-eabi -mcpu=cortex-r5 -o1 -fno-short-enums -mno-unaligned-access -mlittle-endian -g -marm cpsr.c armclang -c --target=arm-arm-none-eabi -mcpu=cortex-r5 -o1 -fno-short-enums -mno-unaligned-access -mlittle-endian -g -mthumb cpsr.c