Hi,
Following are the query regarding the ARM Cortex A7 MP Core.
In ARM Cortex A7 MP Core,facing a issue in memory mapping the registers and accessing the registers by read and write operations.
By means of the reference manual the base configuration address has been read and set to the respective value.
I am not able to write the values by these assembly instruction " asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(0x07));" 0x07 is a data to be written to the PMU register.Even though the user enable register is set before writing the value to the register.
In the manual,the system control register holds a bit "WXN" [Write permission Execute Never] . According to my board,it was 0 (Regions with write permission are not forced to be XN, this is the reset value).Is this bit setting,blocks the write permissions to the other register?
Do i need to enable any register other than "PMUSERENR" before the write operation?
1. Could you please provide me the steps to enable the profiling (to measure the performance)2. I would like to know how to assign the event to the counters in PMU through P15 assembly instructions.
for each core, you should take the following procedures.1) Enable Cycle Counter
MRC p15, 0, r0, c9, c12, 1 ; PMCNTENSET read ORR r0, r0, #0x80000000 ; set C-bit (to use Cycle Counter) MCR p15, 0, r0, c9, c12, 1 ; PMCNTENSET write
2) Enable Event Counter N
MRC p15, 0, r0, c9, c12, 1 ; PMCNTENSET read ORR r0, r0, #(0x1<<N) ; set PN-bit (can be set more than 1 bit) MCR p15, 0, r0, c9, c12, 1 ; PMCNTENSET write
;; 1) and 2) can be done at the same time3) Set Event to Event Counter N (repeat until the number of Event Counters to be used)
MOV r1, #N ; select Event Counter N MCR p15, 0, r1, c9, c12, 5 ; PMSELR write MOV r1, #M ; select Event Number (for example M) MCR p15, 0, r0, c9, c13, 1 ; PMXEVTYPER write
4) Enable PMU
MRC p15, 0, r0, c9, c12, 0 ; PMCR read ORR r0, r0, #0x1 ; set E-bit MCR p15, 0, r0, c9, c12, 0 ; PMCR write
5) Reset Cycle Counter
MRC p15, 0, r0, c9, c12, 0 ; PMCR read ORR r0, r0, #0x4 ; set C-bit MCR p15, 0, r0, c9, c12, 0 ; PMCR write
6) Reset Event Counters
MRC p15, 0, r0, c9, c12, 0 ; PMCR read ORR r0, r0, #0x2 ; set P-bit MCR p15, 0, r0, c9, c12, 0 ; PMCR wire
;; 4), 5) and 6) can be done at the same time by setting value #0x77) Read Cycle Counter Initial Value
MRC p15, 0, rA, c9, c13, 0 ; PMCCNTR read
8) Execute Programs9) Read Cycle Counter Last Value
MRC p15, 0, rB, c9, c13, 0 ; PMCCNTR read
10) Read Event Counter N (repeat until the number of Event Counters to be used)
MOV r0, #N ; select Event Counter N MCR p15, 0, r0, c9, c12, 5 ; PMSELR write MRC p15, 0, rC, c9, c13, 2 ; PMXEVCNTR read
In my case,the counters are not getting incremented, I am not sure which is going wrong.
It would be because the internal signal DBGEN or NIDEN had not been set.To set these signals, you should connect JTAG debugger to the evaluation board.Otherwise, I guess that it would be the same effect if TRSTZ pin would be pulled-up during the system reset.
By the way, as for some evaluation boards, TRSTZ pin had been handled properly, and Event Counters can be used without any debugger.
Anyway, Cycle Counter is always available and it can be used without the JTAG debugger.
Best regards,
Yasuhiko Koumoto.