Understanding Corstone 1000 Cortex M0+ booting process

Hi,

Under TF-M code i can see two bootloaders in bl1 directory one is bl1_1 and bl1_2, but in the arm Corstone_SWArch document i can only see bl1 and bl2..

so for corstone 1000 does arm uses bl1_1 and bl1_2?? why bl1 is split into two directories again?

If possible any expert can please explain this in more detail with the code prospective.

Thanks,

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Stephen Theobald 5 months ago +2 suggested

My name is Stephen and I work at Arm. A colleague provided the following explanation: In general, the BL1 implementation in TFM is split up into BL1_1 and BL1_2. The reason for this is that the BL1_1 should...
Bence Balogh 5 months ago in reply to Bharath Kumar +2 verified

Hello Bharath, In Corstone-1000 case: The Cortex-M0+ core (Secure Enclave) in the system enables the Cortex-A35 core (Host). This can be seen in the tf-m/secure_fw/partitions/ns_agent_mailbox/ns_agent_mailbox...
Bharath Kumar 5 months ago in reply to Bence Balogh +1

Hi Bence, Thanks a lot for the explanation. Thanks, Bharath

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0 Bharath Kumar 5 months ago in reply to Bence Balogh

Hi Bence,

Thanks a lot for the explanation.

Thanks,

Bharath
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0 Bharath Kumar 5 months ago in reply to Bence Balogh

Hi Bence,

Thanks a lot for the explanation.

Thanks,

Bharath
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